The Little Computer 3 (LC‑3) is a pedagogical 16‑bit instruction‑set architecture (ISA) designed for use in introductory computer architecture and organization courses. It was introduced by Yale N. Patt and Sanjay J. Patel in the textbook Introduction to Computing Systems: From Bits and Gates to C and Beyond (2002) and has since been adopted by numerous universities worldwide as a teaching tool.
Purpose and Design
LC‑3 was created to illustrate fundamental concepts of computer hardware and low‑level software without the complexity of commercial ISAs such as x86 or ARM. Its design emphasizes simplicity, regularity, and clarity:
- Word size: 16 bits.
- Address space: 2¹⁶ (65,536) memory locations, each storing a 16‑bit word.
- Registers: Eight general‑purpose registers (R0–R7), each 16 bits wide, plus a program counter (PC) and condition codes (N, Z, P).
- Instruction format: A small set of fixed‑length (16‑bit) instructions divided into three major categories—ALU operations, memory access, and control flow.
- Condition codes: Updated after each arithmetic/logical operation to indicate negative, zero, or positive results, enabling simple branching.
Instruction Set
The LC‑3 ISA comprises 15 opcodes, including:
- ADD, AND, NOT – basic arithmetic and logical operations.
- LD, LDI, LDR, LEA – load data from memory.
- ST, STI, STR – store data to memory.
- BR – conditional branch based on condition codes.
- JMP, JSR, JSRR – subroutine call and return.
- TRAP – system call interface to simulated I/O routines (e.g., GETC, OUT, PUTS, HALT).
All instructions are encoded in a uniform 16‑bit format, facilitating straightforward decoding in a simulated control unit.
Implementation and Tools
LC‑3 is typically explored through software simulators that model the processor’s datapath and control logic. Popular tools include:
- LC‑3 Simulator – a command‑line and graphical environment provided with the textbook, allowing users to assemble LC‑3 assembly language programs, step through execution, and observe register and memory state.
- LC‑3 IDEs – third‑party integrated development environments (e.g., LC‑3 EduSuite) that add debugging and visualization features.
- Hardware realizations – some courses implement LC‑3 on field‑programmable gate arrays (FPGAs) or simple breadboard constructions to demonstrate physical realization of the architecture.
Educational Impact
Because of its minimalistic yet complete design, LC‑3 enables students to:
- Write and debug assembly language programs.
- Understand instruction decoding, microprogramming, and control‑signal generation.
- Explore the relationship between high‑level language constructs and low‑level machine operations.
- Experience the full hardware–software development cycle, from specification to simulation.
The architecture’s clarity has made it a standard component of curricula at institutions such as the University of Texas at Austin, Stanford University, and the University of Cambridge, among others.
Limitations
LC‑3 is intentionally restricted to educational purposes; it lacks features of modern processors such as pipelining, superscalar execution, virtual memory, and complex privilege modes. Consequently, it is not intended for performance benchmarking or commercial application development.
References
- Patt, Y. N., & Patel, S. J. (2002). Introduction to Computing Systems: From Bits and Gates to C and Beyond (2nd ed.). McGraw‑Hill.
- LC‑3 Simulator and documentation, available from the authors’ university web pages.
Note: The information presented above reflects the consensus of published educational materials and publicly available simulator documentation up to the knowledge cutoff date.
